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Demonstration of two-dimensional connectivity for a scalable error-corrected ion-trap quantum processor architecture

Demonstration of two-dimensional connectivity for a scalable error-corrected ion-trap quantum processor architecture

A major hurdle for building a large-scale quantum computer is to scale up the number of qubits while maintaining connectivity between them. In trapped-ion devices, this connectivity can be provided by physically moving subregisters consisting of a few ions across the processor. The topology of the connectivity is given by …