Nanoseconds Timing System Based on IEEE 1588 FPGA Implementation
Nanoseconds Timing System Based on IEEE 1588 FPGA Implementation
Clock synchronization procedures are mandatory in most physical experiments where event fragments are readout by spatially dislocated sensors and must be glued together to reconstruct key parameters (e.g. energy, interaction vertex etc.) of the process under investigation. These distributed data readout topologies rely on an accurate time information available at …