DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration
DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration
Overlays have shown significant promise for field-programmable gate-arrays (FPGAs) as they allow for fast development cycles and remove many of the challenges of the traditional FPGA hardware design flow. However, this often comes with a significant performance burden resulting in very little adoption of overlays for practical applications. In this …