Cross-Layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach
Cross-Layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach
In spite of maturity to the modern electronic design automation (EDA) tools, optimized designs at architectural stage may become suboptimal after going through physical design flow. Adder design has been such a long studied fundamental problem in very large-scale integration industry yet designers cannot achieve optimal solutions by running EDA …