Engineering Electrical and Electronic Engineering

Semiconductor materials and devices

Description

This cluster of papers focuses on the advances in atomic layer deposition (ALD) technology, particularly in the context of high-k dielectrics, gate oxides, and semiconductor devices. It covers topics such as thin film growth, dielectric breakdown mechanisms, metal gate transistors, interface engineering, and the impact of negative bias temperature instability (NBTI) degradation on device performance.

Keywords

Atomic Layer Deposition; High-k Dielectrics; Gate Oxides; Semiconductor Devices; Nanoelectronics; Thin Film Growth; Dielectric Breakdown; Metal Gate Transistors; Interface Engineering; NBTI Degradation

In 1964 Smith and Turner provided the first ever proof of concept for the pulsed laser deposition (PLD) of thin films. The ability of PLD to deposit multicomponent oxide materials … In 1964 Smith and Turner provided the first ever proof of concept for the pulsed laser deposition (PLD) of thin films. The ability of PLD to deposit multicomponent oxide materials with complex stoichiometry as thin films in a controlled manner quickly evolved PLD into a valuable tool for thin-film ceramic material research. The effect of Ca-doped BaTiO3 polycrystalline thin films deposited on Pt-coated Si substrates using pulsed excimer laser ablation technique is reported by Victor et al. Yttrium barium copper oxide, one of the most prevalent high-temperature superconductors, was one of the first complex materials to be successfully deposited as a thin film by using PLD. Oxide substrates have many advantages over Si and sapphire, including lower lattice mismatch with nitride thin films, less difference in coefficient of thermal expansion, ability to grow non-polar nitride films, and higher reactivity of oxides providing easy peeling of nitride films to obtain freestanding nitride thin films.
The anisotropic etching behavior of single‐crystal silicon and the behavior of and in an ethylenediaminebased solution as well as in aqueous , , and were studied. The crystal planes bounding … The anisotropic etching behavior of single‐crystal silicon and the behavior of and in an ethylenediaminebased solution as well as in aqueous , , and were studied. The crystal planes bounding the etch front and their etch rates were determined as a function of temperature, crystal orientation, and etchant composition. A correlation was found between the etch rates and their activation energies, with slowly etching crystal surfaces exhibiting higher activation energies and vice versa. For highly concentrated solutions, a decrease of the etch rate with the fourth power of the water concentration was observed. Based on these results, an electrochemical model is proposed, describing the anisotropic etching behavior of silicon in all alkaline solutions. In an oxidation step, four hydroxide ions react with one surface silicon atom, leading to the injection of four electrons into the conduction band. These electrons stay localized near the crystal surface due to the presence of a space charge layer. The reaction is accompanied by the breaking of the backbonds, which requires the thermal excitation of the respective surface state electrons into the conduction band. This step is considered to be rate limiting. In a reduction step, the injected electrons react with water molecules to form new hydroxide ions and hydrogen. It is assumed that these hydroxide ions generated at the silicon surface are consumed in the oxidation reaction rather than those from the bulk electrolyte, since the latter are kept away from the crystal by the repellent force of the negative surface charge. According to this model, monosilicic acid is formed as the primary dissolution product in all anisotropic silicon etchants. The anisotropic behavior is due to small differences of the energy levels of the backbond surface states as a function of the crystal orientation.
This review provides numerical and graphical information about many (but by no means all) of the physical and electronic properties of GaAs that are useful to those engaged in experimental … This review provides numerical and graphical information about many (but by no means all) of the physical and electronic properties of GaAs that are useful to those engaged in experimental research and development on this material. The emphasis is on properties of GaAs itself, and the host of effects associated with the presence of specific impurities and defects is excluded from coverage. The geometry of the sphalerite lattice and of the first Brillouin zone of reciprocal space are used to pave the way for material concerning elastic moduli, speeds of sound, and phonon dispersion curves. A section on thermal properties includes material on the phase diagram and liquidus curve, thermal expansion coefficient as a function of temperature, specific heat and equivalent Debye temperature behavior, and thermal conduction. The discussion of optical properties focusses on dispersion of the dielectric constant from low frequencies [κ0(300)=12.85] through the reststrahlen range to the intrinsic edge, and on the associated absorption and reflectance behavior. Experimental information concerning the valence and conduction band systems, and on the direct and indirect intrinsic gaps, is used to develop workable approximations for the statitistical weights Nv(T) and Nc(T), and for the intrinsic density. Experimental data concerning mobilities of holes and electrons are briefly reviewed, as is also the vn(E) characteristic for the conduction band system.
A simple method for implementing the steady-state photoconductance technique for determining the minority-carrier lifetime of semiconductor materials is presented. Using a contactless instrument, the photoconductance is measured in a quasi-steady-state … A simple method for implementing the steady-state photoconductance technique for determining the minority-carrier lifetime of semiconductor materials is presented. Using a contactless instrument, the photoconductance is measured in a quasi-steady-state mode during a long, slow varying light pulse. This permits the use of simple electronics and light sources. Despite its simplicity, the technique is capable of determining very low minority carrier lifetimes and is applicable to a wide range of semiconductor materials. In addition, by analyzing this quasi-steady-state photoconductance as a function of incident light intensity, implicit current–voltage characteristic curves can be obtained for noncontacted silicon wafers and solar cell precursors in an expedient manner.
Electronic conduction in thermally grown SiO2 has been shown to be limited by Fowler-Nordheim emission, i.e., tunneling of electrons from the vicinity of the electrode Fermi level through the forbidden … Electronic conduction in thermally grown SiO2 has been shown to be limited by Fowler-Nordheim emission, i.e., tunneling of electrons from the vicinity of the electrode Fermi level through the forbidden energy gap into the conduction band of the oxide. Fowler-Nordheim characteristics have been observed over more than five decades of current for emission from Si, Al, and Mg. If previously measured values of the barrier heights are used, the slopes of the Fowler-Nordheim characteristics (log J/E2 vs 1/E) imply values of the relative effective mass in the forbidden band of about 0.4. These values take into account corrections for image-force barrier lowering and for temperature effects. The absolute values of the currents are lower by a factor of five to ten than the theoretically expected values, probably due to trapping effects. The temperature dependence of the current was found to follow the theoretical curve from 80°–420°K. However, an inconsistent relative effective mass of about 0.95 had to be assumed. These results are believed to provide the most complete examination of the Fowler-Nordheim-emission theory.
We present evidence for a fundamentally new mechanism for impact-induced desorption, viz., core-hole Auger decay. We thereby explain why observed thresholds for electron-stimulated desorption (ESD) of positive ions (${\mathrm{O}}^{+}$, O${\mathrm{H}}^{+}$, … We present evidence for a fundamentally new mechanism for impact-induced desorption, viz., core-hole Auger decay. We thereby explain why observed thresholds for electron-stimulated desorption (ESD) of positive ions (${\mathrm{O}}^{+}$, O${\mathrm{H}}^{+}$, and ${\mathrm{F}}^{+}$) from certain $d$-band metal oxides (Ti${\mathrm{O}}_{2}$, ${\mathrm{V}}_{2}$${\mathrm{O}}_{5}$, and W${\mathrm{O}}_{3}$) correlate in energy with the ionization potential of the highest-lying atomic core levels. We conclude that electron-stimulated desorption is in many interesting cases an atom-specific, valence-sensitive probe of surfaces.
Several improvements of the tetrahedron method for Brillouin-zone integrations are presented. (1) A translational grid of k points and tetrahedra is suggested that renders the results for insulators identical to … Several improvements of the tetrahedron method for Brillouin-zone integrations are presented. (1) A translational grid of k points and tetrahedra is suggested that renders the results for insulators identical to those obtained with special-point methods with the same number of k points. (2) A simple correction formula goes beyond the linear approximation of matrix elements within the tetrahedra and also improves the results for metals significantly. For a required accuracy this reduces the number of k points by orders of magnitude. (3) Irreducible k points and tetrahedra are selected by a fully automated procedure, requiring as input only the space-group operations. (4) The integration is formulated as a weighted sum over irreducible k points with integration weights calculated using the tetrahedron method once for a given band structure. This allows an efficient use of the tetrahedron method also in plane-wave-based electronic-structure methods.
Atomic layer deposition (ALD), a chemical vapor deposition technique based on sequential self-terminating gas–solid reactions, has for about four decades been applied for manufacturing conformal inorganic material layers with thickness … Atomic layer deposition (ALD), a chemical vapor deposition technique based on sequential self-terminating gas–solid reactions, has for about four decades been applied for manufacturing conformal inorganic material layers with thickness down to the nanometer range. Despite the numerous successful applications of material growth by ALD, many physicochemical processes that control ALD growth are not yet sufficiently understood. To increase understanding of ALD processes, overviews are needed not only of the existing ALD processes and their applications, but also of the knowledge of the surface chemistry of specific ALD processes. This work aims to start the overviews on specific ALD processes by reviewing the experimental information available on the surface chemistry of the trimethylaluminum/water process. This process is generally known as a rather ideal ALD process, and plenty of information is available on its surface chemistry. This in-depth summary of the surface chemistry of one representative ALD process aims also to provide a view on the current status of understanding the surface chemistry of ALD, in general. The review starts by describing the basic characteristics of ALD, discussing the history of ALD—including the question who made the first ALD experiments—and giving an overview of the two-reactant ALD processes investigated to date. Second, the basic concepts related to the surface chemistry of ALD are described from a generic viewpoint applicable to all ALD processes based on compound reactants. This description includes physicochemical requirements for self-terminating reactions, reaction kinetics, typical chemisorption mechanisms, factors causing saturation, reasons for growth of less than a monolayer per cycle, effect of the temperature and number of cycles on the growth per cycle (GPC), and the growth mode. A comparison is made of three models available for estimating the sterically allowed value of GPC in ALD. Third, the experimental information on the surface chemistry in the trimethylaluminum/water ALD process are reviewed using the concepts developed in the second part of this review. The results are reviewed critically, with an aim to combine the information obtained in different types of investigations, such as growth experiments on flat substrates and reaction chemistry investigation on high-surface-area materials. Although the surface chemistry of the trimethylaluminum/water ALD process is rather well understood, systematic investigations of the reaction kinetics and the growth mode on different substrates are still missing. The last part of the review is devoted to discussing issues which may hamper surface chemistry investigations of ALD, such as problematic historical assumptions, nonstandard terminology, and the effect of experimental conditions on the surface chemistry of ALD. I hope that this review can help the newcomer get acquainted with the exciting and challenging field of surface chemistry of ALD and can serve as a useful guide for the specialist towards the fifth decade of ALD research.
Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required … Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward successful integration into the expected processing conditions for future CMOS technologies, especially due to their tendency to form at interfaces with Si (e.g. silicates). These pseudobinary systems also thereby enable the use of other high-κ materials by serving as an interfacial high-κ layer. While work is ongoing, much research is still required, as it is clear that any material which is to replace SiO2 as the gate dielectric faces a formidable challenge. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.
Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the … Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the tunnel field-effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal–oxide–semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges. The promise of the TFET is in its ability to provide higher drive current than the MOSFET as supply voltages approach 0.1 V.
Pyrolytic boron nitride, a rather anisotropic material among the III-V compounds, has been investigated in reflection and transmission, using polarized infrared radiation in the spectral range from 100 ${\mathrm{cm}}^{\ensuremath{-}1}$ to … Pyrolytic boron nitride, a rather anisotropic material among the III-V compounds, has been investigated in reflection and transmission, using polarized infrared radiation in the spectral range from 100 ${\mathrm{cm}}^{\ensuremath{-}1}$ to 3000 ${\mathrm{cm}}^{\ensuremath{-}1}$. The reflection spectra have been analyzed by means of a Kramers-Kronig analysis and a classical oscillator fit. The results indicate one infrared active lattice mode for in-plane motion of the particles and one for out-of-plane motion, in accordance with the boron-nitride structure reported by Pease and the resulting group-theoretical selection rules. In addition, one Raman line has been found corresponding to a lattice mode for in-plane motion. Furthermore, the absorption spectrum exhibits several minor peaks which are probably due to 2-phonon combination processes.
Wide-band-gap oxides such as SrTiO3 are shown to be critical tests of theories of Schottky barrier heights based on metal-induced gap states and charge neutrality levels. This theory is reviewed … Wide-band-gap oxides such as SrTiO3 are shown to be critical tests of theories of Schottky barrier heights based on metal-induced gap states and charge neutrality levels. This theory is reviewed and used to calculate the Schottky barrier heights and band offsets for many important high dielectric constant oxides on Pt and Si. Good agreement with experiment is found for barrier heights. The band offsets for electrons on Si are found to be small for many key oxides such as SrTiO3 and Ta2O5 which limit their utility as gate oxides in future silicon field effect transistors. The calculations are extended to screen other proposed oxides such as BaZrO3. ZrO2, HfO2, La2O3, Y2O3, HfSiO4, and ZrSiO4. Predictions are also given for barrier heights of the ferroelectric oxides Pb1−xZrxTiO3 and SrBi2Ta2O9 which are used in nonvolatile memories.
A new memory structure using threshold shifting from charge stored in nanocrystals of silicon (≊5nm in size) is described. The devices utilize direct tunneling and storage of electrons in the … A new memory structure using threshold shifting from charge stored in nanocrystals of silicon (≊5nm in size) is described. The devices utilize direct tunneling and storage of electrons in the nanocrystals. The limited size and capacitance of the nanocrystals limit the numbers of stored electrons. Coulomb blockade effects may be important in these structures but are not necessary for their operation. The threshold shifts of 0.2–0.4 V with read and write times less than 100’s of a nanosecond at operating voltages below 2.5 V have been obtained experimentally. The retention times are measured in days and weeks, and the structures have been operated in an excess of 109 cycles without degradation in performance. This nanomemory exhibits characteristics necessary for high density and low power.
Atomic layer deposition (ALD) is a vapor phase technique capable of producing thin films of a variety of materials. Based on sequential, self-limiting reactions, ALD offers exceptional conformality on high-aspect … Atomic layer deposition (ALD) is a vapor phase technique capable of producing thin films of a variety of materials. Based on sequential, self-limiting reactions, ALD offers exceptional conformality on high-aspect ratio structures, thickness control at the Angstrom level, and tunable film composition. With these advantages, ALD has emerged as a powerful tool for many industrial and research applications. In this review, we provide a brief introduction to ALD and highlight select applications, including Cu(In,Ga)Se2 solar cell devices, high-k transistors, and solid oxide fuel cells. These examples are chosen to illustrate the variety of technologies that are impacted by ALD, the range of materials that ALD can deposit – from metal oxides such as Zn1−xSnxOy, ZrO2, Y2O3, to noble metals such as Pt – and the way in which the unique features of ALD can enable new levels of performance and deeper fundamental understanding to be achieved.
The purity of wafer surfaces is an essential requisite for the successful fabrication of VLSI and ULSI silicon circuits. Wafer cleaning chemistry has remained essentially unchanged in the past 25 … The purity of wafer surfaces is an essential requisite for the successful fabrication of VLSI and ULSI silicon circuits. Wafer cleaning chemistry has remained essentially unchanged in the past 25 years and is based on hot alkaline and acidic hydrogen peroxide solutions, a process known as "RCA Standard Clean." This is still the primary method used in the industry. What has changed is its implementation with optimized equipment: from simple immersion to centrifugal spraying, megasonic techniques, and enclosed system processing that allow simultaneous removal of both contaminant films and particles. Improvements in wafer drying by use of isopropanol vapor or by "slow‐pull" out of hot deionized water are being investigated. Several alternative cleaning methods are also being tested, including choline solutions, chemical vapor etching, and UV/ozone treatments. The evolution of silicon wafer cleaning processes and technology is traced and reviewed from the 1950s to August 1989.
In ab initio theory, defects are routinely modeled by supercells with periodic boundary conditions. Unfortunately, the supercell approximation introduces artificial interactions between charged defects. Despite numerous attempts, a general scheme … In ab initio theory, defects are routinely modeled by supercells with periodic boundary conditions. Unfortunately, the supercell approximation introduces artificial interactions between charged defects. Despite numerous attempts, a general scheme to correct for these is not yet available. We propose a new and computationally efficient method that overcomes limitations of previous schemes and is based on a rigorous analysis of electrostatics in dielectric media. Its reliability and rapid convergence with respect to cell size is demonstrated for charged vacancies in diamond and GaAs.
In this work we derive closed expressions for the head of the frequency-dependent microscopic polarizability matrix in the projector-augmented wave (PAW) methodology. Contrary to previous applications, the longitudinal expression is … In this work we derive closed expressions for the head of the frequency-dependent microscopic polarizability matrix in the projector-augmented wave (PAW) methodology. Contrary to previous applications, the longitudinal expression is utilized, resulting in dielectric properties that are largely independent of the applied potentials. The improved accuracy of the present approach is demonstrated by comparing the longitudinal and transversal expressions of the polarizability matrix for a number of cubic semiconductors and one insulator, i.e., Si, SiC, AlP, GaAs, and diamond (C), respectively. The methodology is readily extendable to more complicated nonlocal Hamiltonians or to the calculation of the macroscopic dielectric matrix including local field effects in the random phase or density functional approximation, which is demonstrated for the previously mentioned model systems. Furthermore, density functional perturbation theory is extended to the PAW method, and the respective results are compared to those obtained by summation over the conduction band states.
An ohmic contact between a metal and an insulator facilitates the injection of electrons into the insulator. Subsequent flow of the electrons is space-charge limited. In real insulators the trapping … An ohmic contact between a metal and an insulator facilitates the injection of electrons into the insulator. Subsequent flow of the electrons is space-charge limited. In real insulators the trapping of electrons in localized states in the forbidden gap profoundly influences the current flow. The interesting features of the current density-voltage ($J\ensuremath{-}V$) characteristic are confined within a "triangle" in the $logJ\ensuremath{-}logV$ plane bounded by three limiting curves: Ohm's law, Child's law for solids ($J\ensuremath{\propto}{V}^{2}$) and a traps-filled-limit curve which has a voltage threshold and an enormously steep current rise. Simple inequalities relating the true field at the anode to the ohmic field facilitate qualitative discussion of the $J\ensuremath{-}V$ characteristic. Exact solutions have been obtained for an insulator with a single, discrete trap level in a simplified theory which idealizes the ohmic contact and neglects the diffusive contribution to the current. The discrete trap level produces the same type of nonlinearity discovered by Smith and Rose and attributed by them to traps distributed in energy.
The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (1.4 nm) that its leakage current is … The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or 'high K' gate oxides such as hafnium oxide and hafnium silicate. These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects. Intensive research was needed to develop these oxides as high quality electronic materials. This review covers both scientific and technological issues—the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts. The oxygen vacancy is the dominant electron trap. It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind. Issues about work function control in metal gate electrodes are discussed.
Aqueous HF etching of silicon surfaces results in the removal of the surface oxide and leaves behind silicon surfaces terminated by atomic hydrogen. The effect of varying the solution pH … Aqueous HF etching of silicon surfaces results in the removal of the surface oxide and leaves behind silicon surfaces terminated by atomic hydrogen. The effect of varying the solution pH on the surface structure is studied by measuring the SiH stretch vibrations with infrared absorption spectroscopy. Basic solutions ( pH=9–10) produce ideally terminated Si(111) surfaces with silicon monohydride ( 3/4 SiH) oriented normal to the surface. The surface is found to be very homogeneous with low defect density (<0.5%) and narrow vibrational linewidth (0.95 cm−1 ).
"Spintronics," in which both the spin and charge of electrons are used for logic and memory operations, promises an alternate route to traditional semiconductor electronics. A complete logic architecture can … "Spintronics," in which both the spin and charge of electrons are used for logic and memory operations, promises an alternate route to traditional semiconductor electronics. A complete logic architecture can be constructed, which uses planar magnetic wires that are less than a micrometer in width. Logical NOT, logical AND, signal fan-out, and signal cross-over elements each have a simple geometric design, and they can be integrated together into one circuit. An additional element for data input allows information to be written to domain-wall logic circuits.
We show that the islands formed in Stranski-Krastanow (SK) growth of Ge on Si(100) are initially dislocation free. Island formation in true SK growth should be driven by strain relaxation … We show that the islands formed in Stranski-Krastanow (SK) growth of Ge on Si(100) are initially dislocation free. Island formation in true SK growth should be driven by strain relaxation in large, dislocated islands. Coherent SK growth is explained in terms of elastic deformation around the islands, which partially accommodates mismatch. The limiting critical thickness, ${\mathit{h}}_{\mathit{c}}$, of coherent SK islands is shown to be higher than that for 2D growth. We demonstrate growth of dislocation-free Ge islands on Si to a thickness of \ensuremath{\approxeq}500 \AA{}, 50\ifmmode\times\else\texttimes\fi{}higher than ${\mathit{h}}_{\mathit{c}}$ for 2D Ge/Si epitaxy.
A new and accurate approach to charge-pumping measurements for the determination of the Si-SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> interface state density directly on MOS transistors is presented. By a careful analysis … A new and accurate approach to charge-pumping measurements for the determination of the Si-SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> interface state density directly on MOS transistors is presented. By a careful analysis of the different processes of emission of electrons towards the conduction band and of holes towards the valence band, depending on the charge state of the interface, all the previously ill-understood phenomena can be explained and the deviations from the simple charge-pumping theory can be accounted for. The presence of a geometric component in some transistor configurations is illustrated and the influence of trapping time constants is discussed. Furthermore, based on this insight, a new technique is developed for the determination of the energy distribution of interface states in small-area transistors, without requiring the knowledge of the surface potential dependence on gate voltage.
Boron doses of 1×1012–5×1015/cm2 were implanted at 60 keV into 1-μm-thick polysilicon films. After annealing at 1100 °C for 30 min, Hall and resistivity measurements were made over a temperature … Boron doses of 1×1012–5×1015/cm2 were implanted at 60 keV into 1-μm-thick polysilicon films. After annealing at 1100 °C for 30 min, Hall and resistivity measurements were made over a temperature range −50–250 °C. It was found that as a function of doping concentration, the Hall mobility showed a minimum at about 2×1018/cm3 doping. The electrical activation energy was found to be about half the energy gap value of single-crystalline silicon for lightly doped samples and decreased to less than 0.025 eV at a doping of 1×1019/cm3. The carrier concentration was very small at doping levels below 5×1017/cm3 and increased rapidly as the doping concentration was increased. At 1×1019/cm3 doping, the carrier concentration was about 90% of the doping concentration. A grain-boundary model including the trapping states was proposed. Carrier concentration and mobility as a function of doping concentration and the mobility and resistivity as a function of temperature were calculated from the model. The theoretical and experimental results were compared. It was found that the trapping state density at the grain bound was 3.34×1012/cm2 located at 0.37 eV above the valence band edge.
A new technique, deep-level transient spectroscopy (DLTS), is introduced. This is a high-frequency capacitance transient thermal scanning method useful for observing a wide variety of traps in semiconductors. The technique … A new technique, deep-level transient spectroscopy (DLTS), is introduced. This is a high-frequency capacitance transient thermal scanning method useful for observing a wide variety of traps in semiconductors. The technique is capable of displaying the spectrum of traps in a crystal as positive and negative peaks on a flat baseline as a function of temperature. It is sensitive, rapid, and easy to analyze. The sign of the peak indicates whether the trap is near the conduction or valence band, the height of the peak is proportional to the trap concentration, and the position, in temperature, of the peak is uniquely determined by the thermal emission properties of the trap. In addition, one can measure the activation energy, concentration profile, and electron- and hole-capture cross sections for each trap. The technique is presented with a simple theoretical analysis for the case of exponential capacitance transients. Various traps in GaAs are used as examples to illustrate certain features of the DLTS technique. Finally, a critical comparison is made with other recent capacitance techniques.
The thermal-oxidation kinetics of silicon are examined in detail. Based on a simple model of oxidation which takes into account the reactions occurring at the two boundaries of the oxide … The thermal-oxidation kinetics of silicon are examined in detail. Based on a simple model of oxidation which takes into account the reactions occurring at the two boundaries of the oxide layer as well as the diffusion process, the general relationship x02+Ax0=B(t+τ) is derived. This relationship is shown to be in excellent agreement with oxidation data obtained over a wide range of temperature (700°–1300°C), partial pressure (0.1–1.0 atm) and oxide thickness (300–20 000 Å) for both oxygen and water oxidants. The parameters A, B, and τ are shown to be related to the physico-chemical constants of the oxidation reaction in the predicted manner. Such detailed analysis also leads to further information regarding the nature of the transported species as well as space-charge effects on the initial phase of oxidation.
Self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$-type silicon. Quantum effects are taken into account in the effective-mass approximation, and the … Self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$-type silicon. Quantum effects are taken into account in the effective-mass approximation, and the envelope wave function is assumed to vanish at the surface. Approximate analytic results are given for some special cases. Numerical results are given for representative surface orientations, bulk acceptor concentrations, inversion-layer electron concentrations, and temperatures.
Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical … Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</inf> H bonds. The device lifetime τ is proportional to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5}</tex> . If I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</inf> is large because of small <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</tex> or large V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</inf> , etc., τ will be small. I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</inf> (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> and I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sub</inf> and, when properly designed, reduce device degradation.
In this paper, we propose and validate a novel design for a double-gate tunnel field-effect transistor (DG tunnel FET), for which the simulations show significant improvements compared with single-gate devices … In this paper, we propose and validate a novel design for a double-gate tunnel field-effect transistor (DG tunnel FET), for which the simulations show significant improvements compared with single-gate devices using a gate dielectric. For the first time, DG tunnel FET devices, which are using a high-gate dielectric, are explored using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average subthreshold swing of 57 mV/dec, and a minimum point slope of 11 mV/dec. The 2D nature of tunnel FET current flow is studied, demonstrating that the current is not confined to a channel at the gate-dielectric surface. When varying temperature, tunnel FETs with a high-kappa gate dielectric have a smaller threshold voltage shift than those using SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , while the subthreshold slope for fixed values of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> remains nearly unchanged, in contrast with the traditional MOSFET. Moreover, an I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ratio of more than 2 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> is shown for simulated devices with a gate length (over the intrinsic region) of 50 nm, which indicates that the tunnel FET is a promising candidate to achieve better-than-ITRS low-standby-power switch performance.
The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current … The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or ‘high K’ gate oxides such as hafnium oxide and hafnium silicate. Little was known about such oxides, and it was soon found that in many respects they have inferior electronic properties to SiO2, such as a tendency to crystallise and a high concentration of electronic defects. Intensive research is underway to develop these oxides into new high quality electronic materials. This review covers the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects. The use of high K oxides in capacitors of dynamic random access memories is also covered.
High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the … High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.
This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/. Scaling relationships … This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/. Scaling relationships are presented which show how a conventional MOSFET can be reduced in size. An improved small device structure is presented that uses ion implantation, to provide shallow source and drain regions and a nonuniform substrate doping profile. One-dimensional models are used to predict the substrate doping profile and the corresponding threshold voltage versus source voltage characteristic. A two-dimensional current transport model is used to predict the relative degree of short-channel effects for different device parameter combinations. Polysilicon-gate MOSFET's with channel lengths as short as 0.5 /spl mu/ were fabricated, and the device characteristics measured and compared with predicted values. The performance improvement expected from using these very small devices in highly miniaturized integrated circuits is projected.
ADVERTISEMENT RETURN TO ISSUEPREVReviewNEXTAtomic Layer Deposition: An OverviewSteven M. George*View Author Information Department of Chemistry and Biochemistry and Department of Chemical and Biological Engineering, University of Colorado, Boulder, Colorado 80309* … ADVERTISEMENT RETURN TO ISSUEPREVReviewNEXTAtomic Layer Deposition: An OverviewSteven M. George*View Author Information Department of Chemistry and Biochemistry and Department of Chemical and Biological Engineering, University of Colorado, Boulder, Colorado 80309* E-mail address: [email protected].Cite this: Chem. Rev. 2010, 110, 1, 111–131Publication Date (Web):November 30, 2009Publication History Received12 February 2009Published online30 November 2009Published inissue 13 January 2010https://pubs.acs.org/doi/10.1021/cr900056bhttps://doi.org/10.1021/cr900056breview-articleACS PublicationsCopyright © 2009 American Chemical SocietyRequest reuse permissionsArticle Views67656Altmetric-Citations4604LEARN ABOUT THESE METRICSArticle Views are the COUNTER-compliant sum of full text article downloads since November 2008 (both PDF and HTML) across all institutions and individuals. These metrics are regularly updated to reflect usage leading up to the last few days.Citations are the number of other articles citing this article, calculated by Crossref and updated daily. Find more information about Crossref citation counts.The Altmetric Attention Score is a quantitative measure of the attention that a research article has received online. Clicking on the donut icon will load a page at altmetric.com with additional details about the score and the social media presence for the given article. Find more information on the Altmetric Attention Score and how the score is calculated. Share Add toView InAdd Full Text with ReferenceAdd Description ExportRISCitationCitation and abstractCitation and referencesMore Options Share onFacebookTwitterWechatLinked InRedditEmail Other access optionsGet e-Alertsclose SUBJECTS:Atomic layer deposition,Deposition,Oxides,Precursors,Surface reactions Get e-Alerts
The bonding of Si atoms at the ${\mathrm{SiO}}_{2}$/Si interface is determined via high-resolution core-level spectroscopy with use of synchrotron radiation. All four oxidation states of Si are resolved, and their … The bonding of Si atoms at the ${\mathrm{SiO}}_{2}$/Si interface is determined via high-resolution core-level spectroscopy with use of synchrotron radiation. All four oxidation states of Si are resolved, and their distribution is measured for Si(100) and Si(111) substrates. For oxides grown in pure ${\mathrm{O}}_{2}$, the density of Si atoms in intermediate oxidation states is (1.5\ifmmode\pm\else\textpm\fi{}0.5)\ifmmode\times\else\texttimes\fi{}${10}^{15}$ ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}2}$. This value is obtained by measuring the core-level intensity, the escape depth in Si and ${\mathrm{SiO}}_{2}$, and the relative Si 2p photoionization cross section for different oxidation states. From the density and distribution of intermediate-oxidation states, models of the interface structure are obtained. The interface is not abrupt, as evidenced by the high density of intermediate-oxidation states (about two monolayers of Si) and by their nonideal distribution. The finite width of the interface is explained by the bond-density mismatch between ${\mathrm{SiO}}_{2}$ and Si. The electrical properties of the interface (band lineup, Fermi, and vacuum level) are determined. Annealing in ${\mathrm{H}}_{2}$ is found to influence the electrical parameters by removing the ${P}_{b}$ centers that pin the Fermi level. The distribution of oxidation states is not affected.
Al2O3 films were deposited by atomic layer deposition (ALD) at temperatures as low as 33 °C in a viscous-flow reactor using alternating exposures of Al(CH3)3 (trimethylaluminum [TMA]) and H2O. Low-temperature … Al2O3 films were deposited by atomic layer deposition (ALD) at temperatures as low as 33 °C in a viscous-flow reactor using alternating exposures of Al(CH3)3 (trimethylaluminum [TMA]) and H2O. Low-temperature Al2O3 ALD films have the potential to coat thermally fragile substrates such as organic, polymeric, or biological materials. The properties of low-temperature Al2O3 ALD films were investigated versus growth temperature by depositing films on Si(100) substrates and quartz crystal microbalance (QCM) sensors. Al2O3 film thicknesses, growth rates, densities, and optical properties were determined using surface profilometry, atomic force microscopy (AFM), QCM, and spectroscopic ellipsometry. Al2O3 film densities were lower at lower deposition temperatures. Al2O3 ALD film densities were 3.0 g/cm3 at 177 °C and 2.5 g/cm3 at 33 °C. AFM images showed that Al2O3 ALD films grown at low temperatures were very smooth with a root-mean-squared (RMS) roughness of only 4 ± 1 Å. Current−voltage and capacitance−voltage measurements showed good electrical properties of the low-temperature Al2O3 ALD films. Elemental analysis of the films using forward recoil spectrometry revealed hydrogen concentrations that increased with decreasing growth temperature. No other elements were observed by Rutherford backscattering spectrometry except the parent aluminum and oxygen concentrations. Low-temperature Al2O3 ALD at 58 °C was demonstrated for the first time on a poly(ethylene terephthalate) (PET) polymeric substrate. Al2O3 ALD coatings on PET bottles resulted in reduced CO2 gas permeabilities.
Device technology has become increasingly aware of the application of conduction processes in insulators, as shown in the development of various injection and other devices. The science of these conduction … Device technology has become increasingly aware of the application of conduction processes in insulators, as shown in the development of various injection and other devices. The science of these conduction processes, with emphasis on transport coefficients and on energy levels of defects in the insulator, has also been established for some time.
In the past year it has become possible to fabricate ferroelectric thin-film memories onto standard silicon integrated circuits that combine very high speed (30-nanosecond read/erase/rewrite operation), 5-volt standard silicon logic … In the past year it has become possible to fabricate ferroelectric thin-film memories onto standard silicon integrated circuits that combine very high speed (30-nanosecond read/erase/rewrite operation), 5-volt standard silicon logic levels, very high density (2 by 2 micrometer cell size), complete nonvolatility (no standby power required), and extreme radiation hardness. These ferroelectric random-access memories are expected to replace magnetic core memory, magnetic bubble memory systems, and electrically erasable read-only memory for many applications. The switching kinetics of these films, 100 to 300 nanometers thick, are now well understood, with switching times that fit an activation field dependence that scales applied field and temperature. Earlier problems of fatigue and retention failure are also now understood and have been improved to acceptable levels.
Deposition techniques, like atomic layer deposition (ALD), are used to form high-quality dielectrics for GaN-based metal–oxide–semiconductor (MOS) gate structures due to the lack of a reliable thermal oxide in GaN. … Deposition techniques, like atomic layer deposition (ALD), are used to form high-quality dielectrics for GaN-based metal–oxide–semiconductor (MOS) gate structures due to the lack of a reliable thermal oxide in GaN. Moreover, interfacial GaOx from pre-existing native oxides is thought to adversely impact channel carrier dynamics and induce undesired threshold voltage shifts in GaN-based MOS gate structures. Exposure of the GaN surface to the trimethylaluminum (TMA) precursor prior to standard alumina ALD decreases the native oxide layer on GaN, but the extent of chemical modification has not been well studied in the context of interface composition in a MOS gate structure. Herein, we compare annealed 55 nm Al2O3 dielectric films on GaN grown using either a water-first ALD process or a process including sequential pulses of TMA immediately before the initiation of Al2O3 ALD. Time-of-Flight Secondary Ion Mass Spectrometry measures differences in the interfacial GaOx content between each ALD film. It also detects surface contaminant species like Si, F, S, and C. Furthermore, we report the formation of an AlN species at the Al2O3/GaN interface, which is more prominent for the film grown using the TMA pre-pulse step. In general, this work demonstrates that the TMA pre-pulse step is an effective strategy for cleaning substrate surfaces prior to ALD.
Min-Sik Jung , Jiwoo Kim , Gwan‐Hyoung Lee | physica status solidi (RRL) - Rapid Research Letters
2D materials have attracted significant attention as promising candidates for next‐generation electronic devices due to their atomically thin structure, high mobility, and excellent gate controllability. However, integrating gate dielectrics with … 2D materials have attracted significant attention as promising candidates for next‐generation electronic devices due to their atomically thin structure, high mobility, and excellent gate controllability. However, integrating gate dielectrics with 2D materials remains a critical challenge due to the absence of surface dangling bonds, which hinders uniform dielectric deposition and leads to interface‐related issues, such as charge trapping and mobility degradation. This review provides a comprehensive overview of gate dielectric integration strategies for 2D field‐effect transistors (FETs). The key properties required for dielectric materials in 2D devices are first discussed, including high dielectric constant, wide bandgap, and minimal interfacial defects. Dielectric materials are then classified into layered and nonlayered categories, highlighting their advantages and challenges. Furthermore, various dielectric integration techniques, such as atomic layer deposition (ALD), transfer methods, and in situ oxidation, are explored to address the limitations of conventional deposition approaches. Finally, future perspectives on optimizing dielectric materials and integration methods are presented to enable scalable, high‐performance 2D electronics. By overcoming these challenges, 2D material‐based devices can be fully realized for advanced low‐power and high‐speed semiconductor applications.
Electron and hole impact ionization coefficients are obtained from measurements of high‐Al content Al x Ga 1‐ x N p–n diodes grown on AlN substrates. The photomultiplication method using a … Electron and hole impact ionization coefficients are obtained from measurements of high‐Al content Al x Ga 1‐ x N p–n diodes grown on AlN substrates. The photomultiplication method using a 193 nm pulsed laser is applied to measure the multiplication factor. The impact ionization coefficients are modeled using Chynoweth's formulation, based on electric field profiles determined from the solution of Poisson's equation. A least‐squares fit of the theoretical multiplication factor to the measured multiplication factor yields the impact ionization coefficients and the extracted electron impact ionization coefficients are consistent with previous numerical predictions. Furthermore, the theoretical breakdown voltage and critical electric field are computed based on the extracted impact ionization coefficients. These results provide much‐needed data to further optimize the design of optoelectronic, power switching, and high‐power RF devices based on ultrawide bandgap AlGaN.
Abstract Polymer dielectric materials are promising candidates for next‐generation electronics due to their cost‐effectiveness, molecular‐level structural tunability, and mechanical deformability. Among various fabrication techniques, initiated chemical vapor deposition (iCVD) enables … Abstract Polymer dielectric materials are promising candidates for next‐generation electronics due to their cost‐effectiveness, molecular‐level structural tunability, and mechanical deformability. Among various fabrication techniques, initiated chemical vapor deposition (iCVD) enables high‐purity polymer dielectric films with robust insulating properties. However, the lack of high‐resolution patterning techniques has hindered their integration into high‐density electronics. Here, the dry etching process of an organosilicon polymer dielectric layer fabricated via iCVD process is systematically investigated by using reactive ion etching (RIE) with CF 4 plasma. Direct mode RIE enabled a higher etch rate owing to the combined physical and chemical etching mechanisms, whereas remote mode RIE provided uniform etching with minimal perturbation on the surface morphology. Furthermore, introducing O 2 gas in CF 4 RIE significantly enhanced the etch rate in both modes, reaching ≈1 000 Å min −1 , despite localized pattern distortions caused by SiO x formation. To validate its applicability, an ultrathin (≈33 nm), RIE‐patterned polymer dielectric layer was implemented in an AlGaN/GaN‐based metal‐insulator‐semiconductor high electron mobility transistor (MISHEMT), where the effective gate modulationwas achieved, along with a decent transconductance (≈1.5 mS) and a high current on/off ratio (&gt;10 8 ). This study establishes a systematic, high‐resolution dry etching method for the vapor‐phase deposited, crosslinked polymer dielectric layer, paving the way toward high‐density electronics.
Germanium (Ge) is recognized as a highly promising substrate for a broad spectrum of electronic, optical, and quantum applications, owing to its exceptional properties, including high charge carrier mobility, strong … Germanium (Ge) is recognized as a highly promising substrate for a broad spectrum of electronic, optical, and quantum applications, owing to its exceptional properties, including high charge carrier mobility, strong spin-orbit coupling, and its behavior as a quasi-direct semiconductor. However, the electron transfer effect in Ge, similar to the Gunn effect in GaAs, which induces negative differential resistance, has received relatively little attention thus far. This is likely due to the requirement for a well-defined material system and device architecture for its realization and usually at low temperatures.
Atomic layer etching (ALE) that interacts synergistically with area-selective deposition significantly enhances its accuracy, establishing it as a key technique for the precise control of material deposition and removal in … Atomic layer etching (ALE) that interacts synergistically with area-selective deposition significantly enhances its accuracy, establishing it as a key technique for the precise control of material deposition and removal in the manufacturing of sub-10 nm nanoelectronics. In this study, we report a method for selectively performing ALE on various metal oxides, including ZnO, MgO, Al2O3, Y2O3, SiO2, and ZrO2, using acetylacetone (Hacac) and ozone (O3). This approach exploits the unique chelate coordination properties of β-diketonates, in which two oxygen atoms can simultaneously attach to a single metal center, forming highly volatile chelate complexes. By leveraging these properties, we demonstrate the potential for selective ALE based on the oxidation state of the metal in these compounds, facilitating the formation of volatile metal-ligand complexes and enabling precise, oxidation state-dependent material removal. The selective ALE characteristics are validated through various analytical techniques, including X-ray fluorescence, spectroscopic ellipsometry, scanning electron microscopy, and energy-dispersive X-ray spectroscopy mapping. Additionally, the layer-by-layer etching is elucidated through the use of an in situ quartz crystal microbalance, while an in situ residual gas analyzer tracks the etching dynamics and uncovers the underlying mechanism. This approach offers a method for tailoring etch processes to the unique properties of target materials, providing the precise control and selectivity essential for nanoscale precision. The ability to selectively remove specific materials enables the advancement of innovative designs and complex architectures in cutting-edge nanoelectronics.
Carbon-based materials integrating ultramicroporous architectures with topological quantum characteristics have recently gained prominence as next-generation ion battery anodes due to their exceptional electron/ion transport synergies. Through first-principles calculations, we propose … Carbon-based materials integrating ultramicroporous architectures with topological quantum characteristics have recently gained prominence as next-generation ion battery anodes due to their exceptional electron/ion transport synergies. Through first-principles calculations, we propose a kind of two-dimensional (2D) tetragonal carbon allotrope (C32) possessing robust structural stability across mechanical, dynamical, and thermal domains. This material's unique sp2/sp3-hybridized bonding network simultaneously establishes uniformly distributed ultramicroporous channels (5.43 Å pore diameter, effectively preventing solvent co-intercalation) and manifests highly conductive nodal-line semimetallic properties. Theoretical simulations reveal exceptional Li/Na storage characteristics in bulk C32, including high theoretical capacities (837 mAh/g for Li, 558 mAh/g for Na), low diffusion barriers (0.22 eV for Li, 0.60 eV for Na), and moderate open-circuit voltages (0.26 V for Li, 0.33 V for Na). Notably, it has significantly lower volumetric expansion compared to conventional graphite during Li+/Na+ intercalation. Our work proposes a kind of optimization strategy combining topological electronic state modulation with precise pore structure design, suggesting an effective method for developing high-energy-density and long-cycle-life Li/Na-ion battery anodes.
We have studied the oxidation states and photoluminescence (PL) properties of GaAs(100) samples that incorporated buried InGaAs quantum well (QW) structures prepared by molecular-beam epitaxy (MBE). The surfaces of the … We have studied the oxidation states and photoluminescence (PL) properties of GaAs(100) samples that incorporated buried InGaAs quantum well (QW) structures prepared by molecular-beam epitaxy (MBE). The surfaces of the MBE-grown GaAs(100) samples were controlled so that they were either As-rich c(4 × 4)α, Ga-rich (4 × 6) or Se-terminated (2 × 1) structures prior to oxidation. We found that the As/Ga composition ratio at the initial GaAs surface strongly affects the oxidation processes and the resultant PL properties. An oxidized sample whose initial As-rich surface contains a large amount of As oxide, has a significantly lower PL intensity than As-deficient samples. The reduction of the surface As coverage simply by preparing Ga-rich (4 × 6) and Se-terminated (2 × 1) surfaces has a positive effect on the PL properties, which is maintained even after the oxidation has progressed into deeper layers after longer air exposure, e.g., six months.
We investigated excitonic effects in the complex dielectric function of Ge near the E1 and E1+Δ1 critical points as a function of temperature. By employing Tanguy’s theory for two-dimensional excitons … We investigated excitonic effects in the complex dielectric function of Ge near the E1 and E1+Δ1 critical points as a function of temperature. By employing Tanguy’s theory for two-dimensional excitons [Tanguy, Solid State Commun. 98, 65 (1996)], we fitted the second derivative of the dielectric function to a temperature series of spectroscopic ellipsometry measurements ranging from 4 to 800 K [Emminger et al., J. Vac. Sci. Technol. B 38, 012202 (2020)]. We analyzed the temperature dependence of the effective masses, matrix elements, and exciton binding energies to develop a model for the dielectric function that requires no fitting parameters, apart from energy and broadening. Our calculations not only show a remarkable agreement between theory and experiment, but also provide a model for the absorption by two-dimensional excitons that can be adapted to other applications and materials.
We report on the influence of the areal density of reactive surface sites and the growth temperature on the growth per cycle (GPC) during O2-plasma-assisted atomic layer deposition (ALD) of … We report on the influence of the areal density of reactive surface sites and the growth temperature on the growth per cycle (GPC) during O2-plasma-assisted atomic layer deposition (ALD) of SiO2 using di-sec-butylaminosilane (DSBAS) and dimethylamino trimethylsilane (DMATMS) as precursors. The surface reactions during ALD were monitored using in situ attenuated total reflection Fourier transform infrared spectroscopy. ALD was performed on plasma-deposited SiO2 films, and as the deposition temperature was increased from 100 to 500 °C, the areal density of isolated surface Si-OH groups decreased by a factor of ∼ 8. At 100 °C, ∼ 30% more surface Si-OH groups reacted with DMATMS than DSBAS. This shows that in the first ALD half-cycle, the initial aminosilane coverage is determined by the size of the aminosilane ligand, which reacts with surface Si-OH groups to form an alkylamine as the reaction product. However, in situ ellipsometry shows that the steady-state GPCs for DMATMS and DSBAS at 100 °C were ∼ 1.3 and ∼ 1.8 Å, respectively, which shows that the initial surface coverage of these precursors does not influence the GPC. As the plasma deposition and ALD temperatures were increased from 100 to 500 °C, the GPC for ALD of SiO2 with DSBAS decreased from ∼ 1.8 to ∼ 1.0 Å due to a lower steady-state surface Si-OH density during ALD at higher temperatures. We further show that for DSBAS and DMATMS, a 500 °C preheat step did not influence the GPC. Finally, we attribute the higher GPC for ALD of SiO2 with DSBAS versus DMATMS to a higher efficiency for the formation of surface Si-OH from surface -SiH3 groups versus surface -Si(CH3)3 groups during O2 plasma exposure.
Thomas Rocke , James R. Kermode | Modelling and Simulation in Materials Science and Engineering
Abstract The problem of constructing a dataset for MLIP development which gives the maximum quality in the minimum amount of compute time is complex, and can be approached in a … Abstract The problem of constructing a dataset for MLIP development which gives the maximum quality in the minimum amount of compute time is complex, and can be approached in a number of ways. We introduce a ``Bayesian selection" approach for selecting from a candidate set of structures, and compare the effectiveness of this method against other common approaches in the task of constructing ideal datasets targeting Silicon surface energies. We show that the Bayesian selection method performs much better than Simple Random Sampling at this task (for example, the error on the (100) surface energy is 4.3x lower in the low data regime), and is competitive with a variety of existing selection methods, using ACE and MACE features.
Abstract Atomic layer deposition (ALD) offers inherent advantages in the preparation of ultra‐thin films, particularly for the growth of nanoscale thin films. However, due to the limitations of the ALD … Abstract Atomic layer deposition (ALD) offers inherent advantages in the preparation of ultra‐thin films, particularly for the growth of nanoscale thin films. However, due to the limitations of the ALD cycle concept, the fabrication of three‐component thin films, such as AlGaN, with unequal atomic ratios can result in significant layering, preventing the formation of a uniform layer solid solution. In this article, a sub‐cycle incomplete reaction plasma‐enhanced atomic layer deposition (SIR‐PEALD) process is presented that enables precise adjustment of Al‐content from 0% to 100% and allows for control of the bandgap within the range of 4.2–5.8 eV. Furthermore, it is found that the growth mechanisms and characteristics of SIR‐PEALD on 4H‐SiC closely resemble those of GaN and AlN, with all three exhibiting strong substrate inhibition effects. Additionally, during the ALD growth of AlGaN, surface steps can be filled, resulting in remarkably low film surface roughness of 0.1 nm. By combining HRTEM and EDX, it is demonstrated that the elements in the grown thin film are uniformly distributed, without agglomeration or delamination. The innovative SIR‐PEALD pathway may also be applicable to the growth of other ternary‐ or multicomponent materials and can provide new insights into alloying thin films using ALD.
Yi Chen , Daniel J. Cho , John Hoang +4 more | Journal of Vacuum Science & Technology A Vacuum Surfaces and Films
The selective etching of Si1−xGex over Si enables the fabrication of the gate-all-around field-effect transistors. While ample experimental data have confirmed such selectivity in various halogen-based chemistries, a mechanistic understanding … The selective etching of Si1−xGex over Si enables the fabrication of the gate-all-around field-effect transistors. While ample experimental data have confirmed such selectivity in various halogen-based chemistries, a mechanistic understanding of its origin is lacking. In this work, a kinetics model was developed to explain the volcano-shaped etch rate and selectivity in etching Si1−xGex in F2/Ar at near room temperature, as the germanium composition (Ge%) changes from 0% to 100%. The key reactions dictating this unique etch characteristic are GeF4(g) etching of Si and the formation of nonvolatile (GeF2)n. The competition and balance between these reactions successfully explained the rapid increase in etch rate/selectivity at Ge% below 20% and the decrease at higher Ge% over a wide pressure range (0.5–10 mTorr).
Silicon oxynitride (SiOxNy, hereafter denoted as SiON) thin films represent an intermediate phase between silicon dioxide (SiO2) and silicon nitride (Si3N4). Through systematic compositional ratio adjustments, the refractive index can … Silicon oxynitride (SiOxNy, hereafter denoted as SiON) thin films represent an intermediate phase between silicon dioxide (SiO2) and silicon nitride (Si3N4). Through systematic compositional ratio adjustments, the refractive index can be precisely tuned across a wide range from 1.45 to 2.3. However, the underlying mechanism governing the influence of elemental composition on film structural quality remains insufficiently understood. To address this knowledge gap, we systematically investigate the effects of key industrial plasma-enhanced chemical vapor deposition (PECVD) parameters—including precursor gas selection and flow rate ratios—on SiON film properties. Our experimental measurements reveal that stoichiometric SiOxNy (x = y) achieves a minimum surface roughness of 0.18 nm. As oxygen content decreases and nitrogen content increases, progressive replacement of Si-O bonds by Si-N bonds correlates with increased structural defect density within the film matrix. Capacitance–voltage (C-V) characterization demonstrates a corresponding enhancement in device capacitance following these compositional modifications. Recent studies confirm that controlled modulation of film stoichiometry enables precise tailoring of dielectric properties and capacitive behavior, as demonstrated in SiON-based power electronics, thereby advancing applications in related fields.
Thin films, ranging in thickness from a few nanometers to several micrometers, play a key role in the development of high-voltage and power electronics technologies. Using precise deposition techniques, these … Thin films, ranging in thickness from a few nanometers to several micrometers, play a key role in the development of high-voltage and power electronics technologies. Using precise deposition techniques, these ultra-thin layers provide essential properties such as insulation, thermal management, and improved electrical performance. Using thin films, device miniaturization and performance have been significantly improved, allowing them to be integrated into advanced applications such as capacitors, resistors, and transistors. Their role is particularly evident in wide-bandgap semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN), which have excellent switching speed, breakdown voltage, and thermal performance. This chapter highlights the importance of advanced deposition methods, including atomic layer deposition (ALD) and chemical vapor deposition (CVD), which ensure precise control of film thickness and structure. These technologies produce application-specific, defect-free layers, which are critical for maintaining the reliability and performance of high-voltage systems. Additionally, a variety of materials used in the films, such as high-k dielectrics and nanocomposites, facilitate the development of high capacitance density capacitors and high-performance resistors. Their use in real-world scenarios such as electric vehicles and renewable energy systems has advanced power electronics technology, improving energy conversion, thermal stability, and overall efficiency. Going forward, the integration of new materials and emerging technologies is expected to further enhance the performance of the films. Research into two-dimensional materials such as graphene and transition metal dichalcogenides, as well as nanostructured films embedded with quantum dots and nanowires, offers the potential for next-generation energy storage and conversion devices. Furthermore, flexible and stretchable films open the way to wearable electronics and medical devices. By solving challenges such as thermal management and scalability, thin films have the potential to revolutionize power electronics, driving innovation in applications ranging from smart grids to advanced aerospace systems.
<title>Abstract</title> Ni-rich layered oxide positive electrodes (cathodes) for lithium-ion batteries exhibit chemo-mechanical failures, with the consensus pointing to high-voltage phase transitions as the root cause. To mitigate these issues, compositional … <title>Abstract</title> Ni-rich layered oxide positive electrodes (cathodes) for lithium-ion batteries exhibit chemo-mechanical failures, with the consensus pointing to high-voltage phase transitions as the root cause. To mitigate these issues, compositional modifications (<italic>e.g.</italic>, doping), nanostructuring (<italic>e.g.</italic>, coatings and primary particle engineering), and microstructure modifications are well-established approaches rooted in hierarchal materials design, albeit increasing the synthesis complexity. Here, we demonstrate a simple synthesis strategy that enables exceptionally stable Ni-rich cathodes without doping, coating or concentration gradients. Through extensive multi-scale microscopy, we show that chemo-mechanical failure is closely linked to microstructural non-uniformity (specifically, nanoscale pores), stemming from limited physical contact between solid-state reactants during calcination. Simply by increasing the melting rate of LiOH, we enhance liquid-solid interfacial contact between precursors, resulting in uniformly evolved microstructures. This uniform microstructure leads to excellent cycle life by effectively dissipating strain energy and mitigating chemo-mechanical failure, surprisingly, even in the presence of the high-voltage phase transition. Our findings challenge the widely held belief that suppressing this phase transition and hierarchal material design are necessary for stable Ni-rich cathodes.
GaN-based devices are increasingly recognized as key components for next-generation power electronics. This leads to a strive toward achieving gate dielectrics on GaN with optimal electronic properties. In this article, … GaN-based devices are increasingly recognized as key components for next-generation power electronics. This leads to a strive toward achieving gate dielectrics on GaN with optimal electronic properties. In this article, we report the development of HfO2 thin films on GaN substrates using plasma enhanced atomic layer deposition (PEALD) technique. The atomic scale precision offered by ALD enabled the growth of high-quality HfO2 films. Atomic force microscopy reveals smooth surface morphology, while x-ray reflectometry confirms the formation of dense layers. When applied as a gate dielectric in GaN-based metal–oxide–semiconductor (MOS) capacitors, ∼25 nm HfO2 layers exhibit a high dielectric constant of ≈16, high breakdown field strength of ≈6.8 MV/cm, and low leakage current of ≈10−6 A/cm2, indicating their suitability for advanced applications. Our work provides a comprehensive study on the development and integration of PEALD HfO2 layers in GaN-based MOS devices.
With a view to greater sustainability in the manufacturing process of semiconductor components, a modification of the atomic layer etching (ALE) process was successfully carried out on AlGaN material. Therefore, … With a view to greater sustainability in the manufacturing process of semiconductor components, a modification of the atomic layer etching (ALE) process was successfully carried out on AlGaN material. Therefore, five different ALE modes, such as full-purge, half-purge, purge-free, continuous plasma, and bias-pulsing, were compared with each other. The focus of this work is on reducing the cycle time and, thus, the overall process time, while maintaining the quality with regard to surface morphology and contamination. First, parameter optimization in terms of ion energy, chlorine flux, modification, and removal time was carried out for the half-purge mode as the standard ALE mode. As a result, the etch per cycle (EPC) remained stable and low at (0.20 ± 0.02) nm/cycle for increasing ALE cycle numbers (25, 50, and 75), with no significant increase in surface roughness of 0.3 nm. It demonstrates the high precision and controllability of the standard recipe. The comparison of the five different ALE modes showed similar low roughness values and a consistent low EPC within the optimized process parameters for the full-purge, half-purge, purge-free, and continuous plasma modes. In contrast, the bias-pulsing mode exhibited a higher EPC of (0.33 ± 0.02) nm/cycle, along with surface chlorine contamination. Taking the process time into account, the continuous plasma mode is the best choice for reducing the processing time by up to 60%. Decreasing the processing time will also reduce gas and energy consumption, which positively affects production costs and improves sustainability.
Abstract This paper establishes a two-dimensional discharge model comprising a hydrodynamic module and an electromagnetic field module to compare the outcomes of helium plasma-activated oxygen radical etching based on Penning … Abstract This paper establishes a two-dimensional discharge model comprising a hydrodynamic module and an electromagnetic field module to compare the outcomes of helium plasma-activated oxygen radical etching based on Penning ionization with those of inductively coupled oxygen plasma etching. It analyzes the distribution of Penning ionization products and discusses the feasibility of incorporating the Penning ionization mechanism to enhance the radical etching technique. The findings indicate that employing Penning ionization to activate oxygen for the generation of radical O* in etching circumvents substrate interaction with ions produced by direct plasma, hence diminishing ion energy and bombardment while enhancing uniformity and optimizing particle distribution. The findings of this study illustrate the viability of employing Penning ionization to produce radical O* for etching and offer novel concepts and pathways for enhancing the etching process moving forward.
This study targets an important question in the synthesis of graphitic carbon nitride (g-C3N4) nanosheets via liquid-phase exfoliation (LPE): how does a binary solvent mixture perform relative to its components? … This study targets an important question in the synthesis of graphitic carbon nitride (g-C3N4) nanosheets via liquid-phase exfoliation (LPE): how does a binary solvent mixture perform relative to its components? A machine learning model based on Extra Trees Regressor, when applied to 171 pure solvents and 14,535 binary solvents resulting from their arbitrary combination, reveals an interesting phenomenon where the LPE performance of the binary mixture can be dominated by one of its components. Quantitatively the free energy of exfoliation (ΔGexf), defined as the free energy to separate a unit area of two stacked nanosheets, can have close values for the binary solvent and one of its components that has either a large ΔGexf (low LPE efficacy) or a small ΔGexf (high LPE efficacy). Such nonstandard performance is validated by umbrella sampling molecular dynamics (MD) simulations, and examined in detail for two representative binary solvents: one where N-Methyl-2-pyrrolidone (NMP) dominates in NMP:Cyclohexane mixture showing good LPE performance, and the other where methanol (MET) dominates in MET:Dichloromethane mixture showing poor LPE performance. Results from this study challenge existing, largely surface tension based, solvent selection criteria for LPE, and emphasize the importance of molecular details in the solvation layers around the nanosheets. Our numerical framework, integrating MD with machine learning, can be used to further explore strategies in the synthesis of 2D materials, such as optimizing solvent mixtures and introducing functional groups to g-C3N4.
Abstract At metal/semiconductor interfaces, gap states emerge within the semiconductor band gaps due to the breakdown of translational symmetry and the interface defects. These gap states not only dominate the … Abstract At metal/semiconductor interfaces, gap states emerge within the semiconductor band gaps due to the breakdown of translational symmetry and the interface defects. These gap states not only dominate the Schottky barrier height (SBH) but also contribute to the increase in interface defects. In this review paper, we discuss recent advancements in the understanding of gap states and their roles, i.e., the physics of gap states, at metal/semiconductor interfaces based on our recent theoretical studies.
Abstract Gate‐all‐around field effect transistors (GAAFETs), including nanosheet (NS) and nanowire (NW) structures, are crucial for the advancement of novel logic devices. One significant challenge in GAA NS is the … Abstract Gate‐all‐around field effect transistors (GAAFETs), including nanosheet (NS) and nanowire (NW) structures, are crucial for the advancement of novel logic devices. One significant challenge in GAA NS is the electrical performance mismatch between NMOS and PMOS drive currents, which stems from the different mobility of holes and electrons. In this study, an innovative Fishbone FET structure with nanoscale dimensions integrating SiGe nano‐fins and Si nanosheet is experimentally fabricated. This structure addresses the performance mismatch between NMOS and PMOS in GAAFETs, and enhances the driving capability of the device by increasing the number of effective channels. The Fishbone FET channel is fabricated using dry quasi‐atomic layer etching (quasi‐ALE), which has emerged as a promising candidate for accurately controlling the etching depth of the SiGe layer. Scanning Electron Microscope (SEM), Transmission Electron Microscope (TEM), and X‐ray Photoelectron Spectroscopy (XPS) are employed to systematically investigate various process phenomena and interfacial reaction mechanisms associated with quasi‐ALE. The findings show that etching per cycle is ≈0.27 nm, and the etching process involves a two‐step self‐limiting reaction. This novel channel structure fabrication approach is expected to serve as an important reference for optimizing the channel in GAAFETs.
Rajani Kumar Sindavalam , Nagaraju Dodda | International Journal for Research in Applied Science and Engineering Technology
Delivering precise drug dosages, particularly in critical care, requires infusion pumps. Traditional systems, however, have drawbacks like sluggish user interfaces, security flaws, little personalization, and privacy issues. This project uses … Delivering precise drug dosages, particularly in critical care, requires infusion pumps. Traditional systems, however, have drawbacks like sluggish user interfaces, security flaws, little personalization, and privacy issues. This project uses a federated deep learning framework to present an advanced infusion pump system. Autoencoders identify abnormalities in patient or device behavior, improving safety and early fault detection, while LSTM networks process real-time physiological data to dynamically modify infusion. By optimizing dosage through ongoing patient-specific feedback and learning, reinforcement learning further enhances care. Federated learning allows decentralized training across several devices without transferring sensitive patient data, addressing privacy concerns and guaranteeing compliance with FDA, GDPR, and HIPAA regulations.The system can adjust to individual needs while preserving high security and data integrity thanks to the integration of these technologies. The system, which is made for both home-care and hospital settings, guarantees user trust, scalability, and dependability. In the end, it provides a solid basis for patient-centered, compliant, and intelligent infusion therapy that develops in response to new clinical data.
Abstract Positive aging is usually observed during the operation of quantum dot‐light‐emitting diodes (QLEDs), which introduces significant challenges for accurate performance assessment and industrial standardization. However, the mechanism of positive … Abstract Positive aging is usually observed during the operation of quantum dot‐light‐emitting diodes (QLEDs), which introduces significant challenges for accurate performance assessment and industrial standardization. However, the mechanism of positive aging remains unclear and has long been attributed to the instability of the ZnO‐based electron transport layer. Here, a new operational positive aging mechanism in inverted‐structure QLEDs is reported, primarily driven by trap states at the interface of the hole transport layer (HTL). An elevated hole injection barrier can promote the accumulation of holes and their trapping via defect states, resulting in subsequent non‐radiative recombination. Operational aging induces a progressive reduction in defect‐mediated charge trapping, leading to a marked enhancement in radiative recombination efficiency and the device manifests as positive aging. By employing an insulating layer to spatially isolate the interface between quantum dots and HTL, the non‐radiative recombination of electrons and accumulated holes can be effectively mitigated. Consequently, the positive aging phenomenon is significantly suppressed, and the current efficiency of the fresh device is improved by 240%. These findings elucidate the critical effects of interface properties on carrier dynamics and provide a strategy for achieving optimal device efficiency at the early stage of operation.
Induced vacancy defects have been strategically employed to enhance the performance of semiconductor substrates for surface-enhanced Raman scattering (SERS) applications such as chemical sensing and biosensing. However, maintaining these induced … Induced vacancy defects have been strategically employed to enhance the performance of semiconductor substrates for surface-enhanced Raman scattering (SERS) applications such as chemical sensing and biosensing. However, maintaining these induced vacancy defects over prolonged use remains a significant challenge, as they tend to rapidly self-heal when exposed to air. In this study, we demonstrate that chemically induced oxygen vacancy (CIVO) defects can stabilize defect sites in the metal-organic framework (MOF) SERS substrate. Due to steric hindrance and the coordination environment surrounding the CIVO defects, these vacancies remain stable in atmospheric conditions for 100 days, in stark contrast to the short-lived photoinduced defects in conventional metal oxide semiconductors, which typically persist for only a few minutes. More significantly, the CIVO defect MOF substrates present a 3 orders of magnitude detection limit lower than the pristine MOF. Practical applications were tested by the CIVO defect MOF substrates, in which rhodamine 6G and p-aminoazobenzene molecules can be sensitively and quantitatively detected. This strategy of chemically induced stable oxygen vacancy defects exhibits broad applicability and is expected to further enhance the performance of MOF-based SERS substrates.
Monolithic three-dimensional (M3D) integration of semiconductor devices offers a distinct advantage over two-dimensional size scaling by achieving higher connection densities between the device layers. Still, it presents several technological challenges, … Monolithic three-dimensional (M3D) integration of semiconductor devices offers a distinct advantage over two-dimensional size scaling by achieving higher connection densities between the device layers. Still, it presents several technological challenges, including the fabrication of upper layers, where lattice mismatch complicates the deposition of high-quality oxide layers directly onto prefabricated devices. Additionally, high-temperature postprocesses can lead to intermixing and degradation of underlying layers. Here, we demonstrate a fluorinated graphene (FG) transfer technique that enables the integration of atomic-layer-deposited oxide semiconductors and dielectrics, overcoming lattice mismatch and minimizing intermixing. The dipole interaction between fluorine and carbon in FG enables the deposition of ultraflat and high-quality oxide thin films via atomic layer deposition (ALD). Upon heating to 400 °C, the dissociation of fluorine atoms from graphene (Gr) facilitates detachment and transfer of the oxide films. Using the FG transfer method, we fabricated multiple stacks of oxide thin films with clean van der Waals interfaces, effectively preventing intermixing during the postannealing process. Furthermore, we fabricated top-gate field-effect transistors (FETs) with MoS2 and ZnO channels by stacking Al2O3 as gate dielectric film, achieving high device performance thanks to a high-quality interface. We also demonstrate the transfer of patterned ALD-grown oxide thin films on a large scale using selective deposition and detachment of oxide thin films on the patterned FG. Our findings suggest that the FG transfer technique is a promising approach for advancing M3D integration and addressing challenges related to thermal budget constraints in semiconductor fabrication.
Achieving deterministic control over the properties of low-dimensional materials with nanoscale precision is a long-sought goal. Mastering this capability has a transformative effect on the design of multifunctional electrical and … Achieving deterministic control over the properties of low-dimensional materials with nanoscale precision is a long-sought goal. Mastering this capability has a transformative effect on the design of multifunctional electrical and optical devices. Here, we present an ion-assisted synthetic technique that enables precise control over the material composition and energy landscape of two-dimensional (2D) atomic crystals. Our method transforms binary transition-metal dichalcogenides, like MoSe2, into ternary MoS2αSe2(1-α) alloys with systematically adjustable compositions, α. By piecewise assembly of the lateral, compositionally modulated MoS2αSe2(1-α) segments within 2D atomic layers, we present a synthetic pathway toward the realization of multicompositional designer materials. Our technique enables the fabrication of advanced 2D structures with arbitrary boundaries, dimensions as small as 30 nm, and fully customizable energy landscapes. Our optical characterizations further showcase the potential for implementing tailored optoelectronics in these engineered 2D crystals.
<title>Abstract</title> The effect of in-situ O<sub>2</sub> plasma treatment on the properties of D-CVD grown Al<sub>2</sub>O<sub>3</sub> layers was investigated. The Al<sub>2</sub>O<sub>3</sub> layers were prepared with a high deposition rate, and their … <title>Abstract</title> The effect of in-situ O<sub>2</sub> plasma treatment on the properties of D-CVD grown Al<sub>2</sub>O<sub>3</sub> layers was investigated. The Al<sub>2</sub>O<sub>3</sub> layers were prepared with a high deposition rate, and their surface roughness, density, stoichiometry, and water vapor permeation barrier properties were evaluated before and after the plasma treatment. The results showed that the O<sub>2</sub> plasma treatment significantly reduced the surface roughness and density of the Al<sub>2</sub>O<sub>3</sub> layer, while also curing the pores and defects present on its surface. The treatment led to the migration of Al and oxygen adatoms, resulting in a change in the atomic concentration ratio of Al to O and the formation of a strong bonding structure in the Al<sub>2</sub>O<sub>3</sub> layer. Furthermore, the water vapor transmission rate (WVTR) of the O<sub>2</sub> plasma treated Al<sub>2</sub>O<sub>3</sub> layer remained low and stable over a prolonged exposure time of 2,500 hours, demonstrating its enhanced water vapor barrier performance. In contrast, the WVTR of the non-treated Al<sub>2</sub>O<sub>3</sub> layer increased significantly after 100 hours of exposure. These findings highlight the effectiveness of in-situ O<sub>2</sub> plasma treatment in improving the surface properties and water vapor permeation barrier of D-CVD grown Al<sub>2</sub>O<sub>3</sub> layers, making them promising candidates for various applications requiring high barrier properties.
This study investigated the correlation between the oxygen-argon ratio and crystal phase, the surface flatness and electrical properties of ZrO 2 thin films The films were deposited on transparent conductive … This study investigated the correlation between the oxygen-argon ratio and crystal phase, the surface flatness and electrical properties of ZrO 2 thin films The films were deposited on transparent conductive indium tin oxide (ITO) substrates by DC magnetron sputtering. ZrO 2 films exhibit ZrO cubic and ZrO 2 monoclinic mixed phases when deposited with a low oxygen-argon ratio of 5:45. As the oxygen-argon ratio increases, a gradual phase transition ZrO to orthorhombic ZrO 2 occurs. Besides, the ZrO 2 film deposited with an oxygen-argon ratio of 10:40 exhibits highest resistance to electric field strength, and lowest leakage current.